Computer Architecture and Lab O - ZModule LAB
Academic Year 2023/2024 - Teacher: CORRADO SANTOROExpected Learning Outcomes
Knowledge and understanding: To acquire knowledge and understanding of fundamental concepts of computer systems architecture and of methodological principles that drive its development, in the historical perspective of their evolution.
Applying knowledge and understanding: To acquire problem solving capabilities in computer system design, by trying to solve on-purpose proposed problems, and abilities to make use of, to design and to implement software tools, such as simulators and interpreters, for abstract machines at the lowest levels of computer system organization.
Making judgements: To be able to compare and evaluate the quality of solutions to design problems for computer systems.
Communication skills: To acquire communication skills and proper language to communicate, even with nonexpert people, about problems relating to functioning, design, implementation, and evaluation of computer systems.
Learning skills: To develop the ability to adapt one's own knowledge to the rapid evolution of the discipline and to keep up-to-date through specialized sources in the field.
Course Structure
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Classroom lectures and lab tutorials with exercises
Should teaching be carried out in mixed mode or remotely, it may be necessary to introduce changes with respect to previous statements, in line with the programme planned and outlined in the syllabus.
Detailed Course Content
- Computing machines: historical background
- Computing machines: functional units, architectures
- Algebraic structures, Boole algebra
- Logic gates, sequential circuits, flip-flops
- RISC and CISC architectures, addressing modes
- Type and format of instructions, examples of real assembly languages
- I/O operations, interrupt control and service
- Supporting software, assembly languages and C language, operating systems
- Basic structure of a processor, microarchitectures RISC and CISC
- High-performance processors, prediction techniques, superscalar processors
- Main memory devides, DMA, hierarchy of memories
- Efficient circuits for binary arithmetic
Textbook Information
- C. Hamacher, Z. Vranesic, S. Zaky & N. Manjikian : Introduzione all'architettura dei calcolatori. Third italian edition, McGraw-Hill Education (Italy), 2013
- Supplementary notes provided by the teacher during lecture development.
Course Planning
| Subjects | Text References | |
|---|---|---|
| 1 | Finalità e organizzazione dello studio. Macchine da calcolo: cenni storici. | 1: 1.7 |
| 2 | Macchine da calcolo: unità funzionali, architetture | 1: 1.0-3, 1.6 |
| 3 | Strutture algebriche, algebre di Boole. | 2 |
| 4 | Realizzazione di porte logiche, circuiti sequenziali, flip-flop. | 1: A.5-6 |
| 5 | Architetture RISC e CISC, modi d'indirizzamento, esempi di ISA reali. | 1: 2.0-4, A2.1-2 |
| 6 | Tipi e formati di istruzioni, esempi di linguaggi assemblativi reali. | 1: 2.8, 2.10.2, A2.4-5 |
| 7 | Operazioni di I/O, controllo e servizio delle interruzioni. | 1: 3.0-2.5, A3.1 |
| 8 | Software di supporto, linguaggi assemblativi e C, sistema operativo. | 1: 4.0-9.2 |
| 9 | Struttura di base del processore, microarchitetture RISC e CISC. | 1: 5.0-4 |
| 10 | Processori ad alte prestazioni, tecniche predittive, processori superscalari. | 1: 6.6-10 |
| 11 | Dispositivi di memoria principale, DMA, gerarchia delle memorie. | 1: 8.0-5 |
| 12 | Circuiti efficienti per l'aritmetica binaria. | 1: 9.2-4, 9.6 |