Computer Architecture and Lab F - NModule Computer Architecture
Academic Year 2023/2024 - Teacher: EMILIANO ALESSIO TRAMONTANAExpected Learning Outcomes
Knowledge and understanding: To acquire knowledge and understanding of fundamental concepts of computer systems architecture and of methodological principles that drive its development, in the historical perspective of their evolution.
Applying knowledge and understanding: To acquire problem solving capabilities in computer system design, by trying to solve on-purpose proposed problems, and abilities to make use of, to design and to implement software tools, such as simulators and interpreters, for abstract machines at the lowest levels of computer system organization.
Making judgements: To be able to compare and evaluate the quality of solutions to design problems for computer systems.
Communication skills: To acquire communication skills and proper language to communicate, even with nonexpert people, about problems relating to functioning, design, implementation, and evaluation of computer systems.
Learning skills: To develop the ability to adapt one's own knowledge to the rapid evolution of the discipline and to keep up-to-date through specialized sources in the field.
Course Structure
Classroom lectures and lab tutorials with exercises
Should teaching be carried out in mixed mode or remotely, it may be necessary to introduce changes with respect to previous statements, in line with the programme planned and outlined in the syllabus.
Required Prerequisites
Attendance of Lessons
Detailed Course Content
- Computing machines: historical background
- Computing machines: functional units, architectures
- Algebraic structures, Boole algebra
- Logic gates, sequential circuits, flip-flops
- RISC and CISC architectures, addressing modes
- Type and format of instructions, examples of real assembly languages
- I/O operations, interrupt control and service
- Supporting software, assembly languages and C language, operating systems
- Basic structure of a processor, microarchitectures RISC and CISC
- High-performance processors, prediction techniques, superscalar processors
- Main memory devides, DMA, hierarchy of memories, cache
- Efficient circuits for binary arithmetic
Textbook Information
C. Hamacher, Z. Vranesic, S. Zaky & N. Manjikian : Introduzione all'architettura dei calcolatori. Third italian edition, McGraw-Hill Education (Italy), 2013
Course Planning
Subjects | Text References | |
---|---|---|
1 | Finalità e organizzazione dello studio. Macchine da calcolo: cenni storici. | C. 1 |
2 | Macchine da calcolo: unità funzionali, architetture | C. 1 |
3 | Strutture algebriche, algebre di Boole. | C. 2 |
4 | Realizzazione di porte logiche, circuiti sequenziali, flip-flop. | A |
5 | Architetture RISC e CISC, modi d'indirizzamento | C. 2 |
6 | Tipi e formati di istruzioni, esempi di linguaggi assemblativi | C.2 |
7 | Operazioni di I/O, controllo e servizio delle interruzioni. | C. 3 |
8 | Software di supporto, linguaggi assemblativi e C, sistema operativo | C. 4 |
9 | Struttura di base del processore, microarchitetture RISC e CISC | C. 5 |
10 | Processori ad alte prestazioni, tecniche predittive, processori superscalari | C. 6 |
11 | Dispositivi di memoria principale, DMA, gerarchia delle memorie, cache | C. 8 |
12 | Circuiti efficienti per l'aritmetica binaria | C. 9 |
Learning Assessment
Learning Assessment Procedures
The exam consists of a written test and oral interview. The written test takes place at 9:00 AM on the day of the exam, unless otherwise communicated. The written test lasts one hour and consists of various multiple-choice questions and two open-ended questions that require code implementation and the drawing of diagrams. Passing the written test allows you to proceed to the oral part of the exam, which will be scheduled on days following the written test and communicated in advance.
An excellent evaluation of the written test will be given when the number of correct answers to multiple-choice questions is close to the total number of questions, and when the answers to the open-ended questions are correct and precise.
The exam will be evaluated excellently if you demonstrate a deep understanding of the course concepts and precision in their presentation. An intermediate grade will be given in cases where the exam shows a partial understanding of the topics. A barely passing grade will be awarded when, despite partial knowledge of the topics, they are presented superficially.
The completion and presentation of a project are optional.
The assessment of learning may also be conducted remotely if conditions require it.
Examples of frequently asked questions and / or exercises
Convert from binary to decimal and vice versa
Logic gates and their truth tables
Instructions in Assembly and Assembly programs
Data path for program execution
Execution in pipeline